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rockchip: rk3036: change ddr frequency to 400M
author
Lin Huang
<
[email protected]
>
Wed, 17 Feb 2016 07:55:05 +0000
(15:55 +0800)
committer
Simon Glass
<
[email protected]
>
Thu, 10 Mar 2016 15:32:01 +0000
(08:32 -0700)
emac may use dpll as clock parent, and it request the clock frequency
multiples of 50, so change ddr frequency to 400M.
Signed-off-by: Lin Huang <
[email protected]
>
Signed-off-by: Jeffy Chen <
[email protected]
>
Acked-by: Simon Glass <
[email protected]
>
arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
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diff --git
a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index e3ca8700742da9dcff7d22b976ed7d68a219b2ee..ec8305cff82c5048f8456fb52c8a351e490e7ce4 100644
(file)
--- a/
arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/
arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@
-37,7
+37,7
@@
struct rk3036_sdram_priv {
/* use integer mode, 396MHz dpll setting
* refdiv, fbdiv, postdiv1, postdiv2
*/
-const struct pll_div dpll_init_cfg = {1,
66, 4
, 1};
+const struct pll_div dpll_init_cfg = {1,
50, 3
, 1};
/* 396Mhz ddr timing */
const struct rk3036_ddr_timing ddr_timing = {0x18c,